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Memory Validation Engineer

Location
Mountain View, California
Posted
6 Sep 2022
  • Ensure robust operation and successful integration of DRAM memories and SOC devices for products developed by Google
  • Ensure Memory Controller, DRAM silicon, and board level testing meets JEDEC electrical and functional specifications
  • Execute validation test plans for functional, characterization and qualification
  • Experience with High Bandwidth Scope, Logic/Protocol Analyzer and Temperature Chambers
  • Experience in LPDDR/DDR IO characterization, qualification and reviewing, tuning memory calibration code/algorithms
  • Expertise in bootloader/firmware development in C/C++ and assembly
  • Previous experience in Failure Analysis of DRAM devices
  • Skills with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity
  • 5+ years in Memory Controller validation and DRAM validation
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Details

  • Job Reference: 705657774-2
  • Date Posted: 6 September 2022
  • Recruiter: Wipro
  • Location: Mountain View, California
  • Salary: On Application